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Add new annotation for Chisel Circuit serialization #1580

Merged
merged 1 commit into from
Sep 9, 2020
Merged

Add new annotation for Chisel Circuit serialization #1580

merged 1 commit into from
Sep 9, 2020

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jackkoenig
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@jackkoenig jackkoenig commented Sep 6, 2020 •
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ChiselCircuitAnnotation no longer extends CustomFileEmission, rather it
is Unserializable. Also the --chisel-output-file is added to the
ChiselCli.

New phase AddSerializationAnnotations constructs a
CircuitSerializationAnnotation from ChiselCircuitAnnotation and
ChiselOutputFileAnnotation. Both .fir and .pb file formats are
supported. Default format is .fir unless a --chisel-output-file is
specified with a .pb extension.

This relies on a bugfix in chipsalliance/firrtl#1887 to work.

Contributor Checklist

  • Did you add Scaladoc to every public function/method?
  • Did you add at least one test demonstrating the PR?
  • Did you delete any extraneous printlns/debugging code?
  • Did you specify the type of improvement?
  • Did you add appropriate documentation in docs/src?
  • Did you state the API impact?
  • Did you specify the code generation impact?
  • Did you request a desired merge strategy?
  • Did you add text to be included in the Release Notes for this change?

Type of Improvement

  • bug fix
  • new feature/API

API Impact

This is a binary incompatible modification from RC1, instead of ChiselCircuitAnnotation extending CustomFileEmission and only serializing to .fir, I added a new annotation CircuitSerializationAnnotation that can serialize to both .fir and .pb.

Backend Code Generation Impact

No impact to Verilog, but Chisel can now natively emit .pb

Desired Merge Strategy

  • Squash

Release Notes

Add support for direct protobuf serialization from Chisel via CircuitSerializationAnnotation

Reviewer Checklist (only modified by reviewer)

  • Did you add the appropriate labels?
  • Did you mark the proper milestone (3.2.x, 3.3.x, 3.4.0, 3.5.0) ?
  • Did you review?
  • Did you check whether all relevant Contributor checkboxes have been checked?
  • Did you mark as Please Merge?

@jackkoenig jackkoenig added API Modification Bugfix Fixes a bug, will be included in release notes labels Sep 6, 2020
@jackkoenig jackkoenig added this to the 3.4.0 milestone Sep 6, 2020
@jackkoenig jackkoenig requested a review from seldridge September 6, 2020 01:08
@jackkoenig jackkoenig requested a review from a team as a code owner September 6, 2020 01:08
jackkoenig
jackkoenig commented Sep 8, 2020
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src/test/scala/chiselTests/stage/ChiselMainSpec.scala Outdated
@@ -86,6 +90,7 @@ class ChiselMainSpec extends AnyFeatureSpec with GivenWhenThen with Matchers wit
}
}

println(stdout)
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Suggested change
println(stdout)

seldridge
seldridge approved these changes Sep 9, 2020
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lgtm

One comment. I'm good with a merge after you strip the println you tagged.

src/main/scala/chisel3/stage/phases/AddSerializationAnnotations.scala
def transform(annotations: AnnotationSeq): AnnotationSeq = {
val chiselOptions = view[ChiselOptions](annotations)
val circuit = chiselOptions.chiselCircuit.getOrElse {
throw new ChiselException(s"Unable to locate the elaborated circuit, did ${classOf[Elaborate].getName} run correctly")
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Suggested change
throw new ChiselException(s"Unable to locate the elaborated circuit, did ${classOf[Elaborate].getName} run correctly")
throw new ChiselException(s"Unable to locate the elaborated circuit, did ${classOf[Elaborate].getName} run correctly?")

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I'm of two minds on whether or not this should throw an error. Some phases, like Elaborate, are extremely simple and only do work if a sensitive annotation exists. Any user input checking is then pushed to a "checks" phase which runs before all work starts. (Note: that chisel3.stage.phases.Checks does not current assert that a ChiselGeneratorAnnotation exists... it probably should.)

By this logic, the error message here is a bit odd as it isn't that Elaborate ran, but that there may have been user error where a circuit was never specified.

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To clarify: this is fine as it stands. I would just like some eventual unification in how we handle this.

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Yeah I see your point. I wasn't sure what to do here so I just decided to throw an error, but I'm happy to change this behavior

src/main/scala/chisel3/stage/ChiselAnnotations.scala
/* Caching the hashCode for a large circuit is necessary due to repeated queries.
* Not caching the hashCode will cause severe performance degredations for large [[Circuit]]s.
*/
override lazy val hashCode: Int = circuit.hashCode
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Great catch.

src/test/scala/chiselTests/stage/ChiselMainSpec.scala
@@ -63,7 +66,8 @@ class ChiselMainSpec extends AnyFeatureSpec with GivenWhenThen with Matchers wit
files: Seq[String] = Seq.empty,
stdout: Option[String] = None,
stderr: Option[String] = None,
result: Int = 0) {
result: Int = 0,
fileChecks: Map[String, File => Unit] = Map.empty) {
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Nice addition.

@jackkoenig
Add new annotation for Chisel Circuit serialization
3cc2132 
ChiselCircuitAnnotation no longer extends CustomFileEmission, rather it
is Unserializable. Also the --chisel-output-file is added to the
ChiselCli.

New phase AddSerializationAnnotations constructs a
CircuitSerializationAnnotation from ChiselCircuitAnnotation and
ChiselOutputFileAnnotation. Both .fir and .pb file formats are
supported. Default format is .fir unless a --chisel-output-file is
specified with a .pb extension.
@jackkoenig jackkoenig added the Please Merge Accepted PRs that are ready to be merged. Useful when waiting on CI. label Sep 9, 2020
@mergify mergify bot merged commit a2138cb into master Sep 9, 2020
@jackkoenig jackkoenig deleted the emit-proto branch September 16, 2020 17:33
jackkoenig pushed a commit that referenced this pull request Feb 28, 2023
@azidar @mergify
Have AppendInfo use MultiInfo, rather than appending with : (#1580)
32d814c 
* Bugfix - have AppendInfo use MultiInfo, rather than appending with :

* Address reviewer feedback

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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@seldridge seldridge seldridge approved these changes

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API Modification Bugfix Fixes a bug, will be included in release notes Please Merge Accepted PRs that are ready to be merged. Useful when waiting on CI.
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